In many instances, devices having different gate oxide layer thicknesses need to be integrated on the same semiconductor substrate. For example, thicker gate oxide devices may be formed on the periphery of the semiconductor substrate so that they can handle higher voltages associated with input/output operations. Thinner gate oxide devices may be formed in areas of the substrate where low voltage devices are located.
Formation of thinner gate oxide layers and thicker gate oxide layers is possible through different gate oxide processing of the semiconductor substrate. However, the different gate oxide processing may cause different physical and electrical effects across the low voltage device areas, medium voltage device areas, and high voltage device areas in the semiconductor substrate, such as formation of sharp corners or horns in active material underlying gate oxide layers.
Specifically, it has been found that use of a dual gate oxidation (DGO) process to form gate oxide in medium and/or high voltage device areas of a semiconductor often results in the formation of sharp corners in the underlying active material. Such sharp corners harm device performance. Yet the thinner gate oxide formation process performed in low voltage device areas, such as a single gate (SG) process, typically do not result in sharp corners in the underlying active material.
Accordingly, it is desirable to provide methods for fabricating integrated circuits having improved active regions. Also, it is desirable to provide methods for fabricating integrated circuits with well-formed active regions in both low voltage device areas and in medium and/or high voltage device areas. Furthermore, other desirable features and characteristics will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.